Hardware design interview questions

  1. Give two ways of converting a two input NAND gate to an inverter
  2. Given a circuit, draw its exact timing response. (I was given a Pseudo Random Signal Generator; you can expect any sequential ckt)
  3. What are set up time & hold time constraints? What do they signify? Which one is critical for estimating maximum clock frequency of a circuit?
  4. Give a circuit to divide frequency of clock cycle by two
  5. Design a divide-by-3 sequential circuit with 50% duty circle. (Hint: Double the Clock)
  6. Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can’t resize the combinational circuit transistors)
  7. The answer to the above question is breaking the combinational circuit and pipelining it. What will be affected if you do this?
  8. What are the different Adder circuits you studied?
  9. Give the truth table for a Half Adder. Give a gate level implementation of the same.
  10. Draw a Transmission Gate-based D-Latch.
  11. Design a Transmission Gate based XOR. Now, how do you convert it to XNOR? (Without inverting the output)
  12. How do you detect if two 8-bit signals are same?
  13. How do you detect a sequence of "1101" arriving serially from a signal line?
  14. Design any FSM in VHDL or Verilog.
  15. Explain RC circuit’s charging and discharging.
  16. Explain the working of a binary counter.
  17. Describe how you would reverse a singly linked list.
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8 Comments on Hardware design interview questions

  1. Posted 12/10/2003 at 2:56 pm | Permalink

    thanks a lot…ur questions are very interesting and informative…i want to submit a question to you”

    A sub-circuit is given, which is in the form of a disk that can rotate CW or ACW. You need to design a
    logic that can recognize the direction of rotation of this disc..”

  2. Vishwa
    Posted 11/23/2004 at 8:52 pm | Permalink

    Here are a few questions to add on to this database.
    1. Explain RC circuit’s charging and discharging.
    2. Explain the working of a binary counter.
    3. Describe how you would reverse a singly linked list.

  3. Gaurav Sanghai
    Posted 4/13/2005 at 12:43 am | Permalink

    Dear sir

    http://www.techinterviews.com/?p=14#more-14; this is the page where u have published, only the questions to hardware design.. It would been of great use if u had given the answer side by side, like all the other pages.

    If possible do so, i request the senior and the website people who r engaged.

    Good Effort
    Thank you
    Gaurav Sanghai

  4. Prasanna.C
    Posted 6/6/2005 at 9:20 am | Permalink

    Respected sir,

    This is prasanna.C doind my final ME Communication Systems.I really
    tell you that this is a wonderful site for the hardware questions as
    far i seen till now.

    The purpose of this site still be glore if you published the answers
    for these questions.Is there any problem with publishing the answers?

    If you want i ready to pay the money fot the answers.Though we had tried
    out the satisfaction can only get by seeing the answers.

    So, irequest you to publish the answers for these questions and us to
    get benefit.

    Thanking you.
    A Lover of techinterviews.com

    Prasanna.C

  5. Mohammad Usaid Abbasi
    Posted 10/16/2005 at 2:47 am | Permalink

    Here are some of the interview questions which could be helpful for engineers finding job in VLSI design
    1.Make a 16:1 multiplexer using only 2:1 multiplexers.
    2.What are the various types of capacitances associated with Mosfets?
    3.What are static hazards and dynamic hazards in logic circuits and how they can be minimised?
    4.What is the minimal cost and minimal risk solution?
    5.What are the blocking and non blocking assignments in Verilog and which is preferred in Sequential circuits.

  6. BHUVANESWARI RADHA KRISHNAN
    Posted 8/31/2006 at 6:50 am | Permalink

    RESPECTED SIR,THIS IS BHUVANA. THIS WEBSITE IS VERY USEFUL AND I LIKE TO ADD THESE QUESTIONS TO IT:
    1.DESIGN 16 BY 1 MUX USING 4 4 BY 1 MUX
    2. WHAT IS THE PURPOSE OF DIVING 6MHZ CLK FREQUENCY IN TO 2 ,3MHZ INSIDE 8085 MICROPROCESSORS

  7. Ani
    Posted 1/3/2008 at 5:57 am | Permalink

    Qno 1:
    The two inputs of a nand gate are connected together to get an inverter.

  8. AJP
    Posted 1/28/2008 at 7:04 am | Permalink

    Question 1.
    The output of Nand gate is given back to one of the input of the Nand gate as a feed back,it works as an invertor.

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